Semiconductor devices, such as transistors, are the core building block of the vast majority of electronic devices. In practice, it is desirable to accurately and precisely fabricate transistors and other semiconductor devices with physical features having specific physical dimensions to thereby achieve semiconductor devices having their intended performance characteristics and to improve yield. However, the hardware tools used to fabricate the devices may exhibit performance variations. As a result, devices may be fabricated with features that deviate from their specified physical dimensions, which, in turn, could lead to failures at wafer test and, accordingly, reduce yield. Thus, it is desirable to measure physical features, critical dimensions and/or other properties of devices during fabrication to correct any deviations from the intended physical dimensions and thereby reduce the likelihood of failures at wafer test and improve yield. However, obtaining highly accurate measurements typically takes an undesirably long amount of time or involves destructive metrologies that reduce yield. At the same time, non-destructive measurement tools may be limited in their ability to accurately measure all of the physical features, critical dimensions, and profile information of a device, which, in turn, limits the ability of a foundry (or fab) to maximize yield.